Back-end metallisation process

ABSTRACT

The invention provides for a back-end metallisation process in which a recess is filled with copper and which includes the step of forming a plating base on the surfaces of the recess for the subsequent galvanic deposition of the said copper, and wherein subsequent to the formation of the plating base, but prior to the galvanic deposition of the copper, a modifying agent is introduced to the recess and which serves to absorb in the surface regions not covered by the plating base and to thereby modify the surface to promote copper growth thereon so as to effectively repair the initial plating base before the copper plating fill commences.

The present invention relates to a method of manufacturing an electronicdevice and, in particular, to a back-end metallisation process in whicha recess is to be filled with copper and including the step of forming aplating base on the surfaces of the recess for subsequent galvanicdeposition of the said copper.

As part of the known damascene process for achieving back-endmetallisation, recesses, for example vias and holes, are filled withcopper by means of a galvanic deposition process. This process requiresthe presence of a plating base, such as a so-called copper seed layer,which is formed on the surfaces of a recess and which serves to providesufficient conductance to allow for a uniform current distributionacross, for example, a wafer substrate within which recesses are filledduring subsequent galvanic copper deposition.

However, the quality and integrity of such a plating base layer whenapplied to wafers with recesses exhibiting high aspect ratio values, forexample larger than four for recess diameters smaller than 18 μm, canprove to be disadvantageously limited. The layer often proves to beinsufficient insofar as it is too thin or is non-uniform. Suchvariations in thickness and uniformity prevent complete copper-fill ofthe recess during the subsequent galvanic deposition, such thatcopper-free voids remain within the structure.

WO-A-99/47731 relates to a damascene process in which an initial copperseed layer forming a plating base is subsequently enhanced by anelectrode deposition reaction employing a dedicated alkaline solution.Once a predetermined copper thickness has been obtained further platingsteps are undertaken in order to fill any gaps that arise. However, thisknown process is disadvantageous in that it cannot be performed inrelation to an initial copper-seed layer of ordinary thickness sincewith relatively large wafers, non-uniformity problems would arise duringthe subsequent enhancement step due to the high sheet resistance valuesencountered. Further, this known process requires electrical contact inorder to achieve the required surface modification and the use of analkaline plating solution can lead to large pH variations which can, inturn, impose disadvantageously strict requirements with regard torinsing requirements between the various process steps.

SUMMARY OF INVENTION

The present invention seeks to provide for a back-end metallisationprocess exhibiting an advantage of known such processes.

According to one aspect of the present invention there is provided aback-end metallisation process of the above-mentioned type andcharacterized in that, subsequent to the formation of the plating base,but prior to the galvanic deposition of the said copper, a modifyingagent is introduced to the recess which is arranged to absorb in surfaceregions of the recess not covered by the plating base and thereby modifythe said surface regions so as to promote galvanic deposition of copperthereon.

The invention is advantageous in that the process can be applied to acopper seed layer of standard, or even lower, thickness and, further,the surface modification does not require electrical contact and can beachieved by means of an acidic or neutral solution. The process is alsoadvantageously self-limiting in that, after a certain time period, thesurface modification can achieve uniformity across, for example, thewhole wafer in which recesses are formed.

The invention therefore provides for a relatively simple process whichdoes not result in large pH variations and wherein currently availablewell-developed solutions can be used. For example, an acidic copperplating bath can be employed of the same or similar type to that whichis standard in a current damascene back-filled process.

It will therefore be appreciated that, for example, the side-wallsurfaces of recesses such as vias and holes, formed in a semiconductorwafer, can be modified after the copper seed layer has been deposited.Such modification serves to enhance subsequent galvanic copper growth ina lateral direction until all regions of the side-wall surface of thevia or hole are covered with copper such that normal galvanic coppergrowth can then occur without the above-mentioned problematic voidsremaining. The process step applied to the wall regions not covered bythe copper seed layer can of course also be applied to regions where thecopper seed layer is present.

Various embodiments of the present invention advantageously provide forenhancing the high lateral growth rate of copper, and improving thelateral growth of copper on regions of the side-wall surfaces where thecopper seed layer is absent.

The features of the remaining claims relate to advantageous forms of themodifying agent having regard to the standard composition of a substratelayer to which a copper-fill damascene process is applied.

As will therefore be appreciated, the present invention provides, forexample, for the modification of the surface of recess side-walls so asto promote lateral growth of galvanic copper. Such lateral growth isdefined as a higher growth rate in a direction parallel to the wafersurface than in a direction perpendicular thereto such that, forexample, an insufficient copper seed layer is then first repaired by thesaid lateral growth prior to steps relating to normal recess fill.

The electronic device is a semiconductor device by preference, andespecially an integrated circuit. In this embodiment the recess ispresent at a side of a semiconductor substrate, in which a plurality ofsemiconductor elements, such as transistors and diodes, have beendefined. As will be known by the person skilled in the art, integratedcircuits usually comprise 3-6 interconnect layers. Vias are presentbetween these interconnect layers, and between and interconnect layerand contacts of the individual transistors. Alternatively, theelectronic device may be a thin-film device comprising a plurality ofpassive components, and optionally, any thin film transistors

BRIEF DESCRIPTION OF DRAWINGS

The invention is described further hereinafter, by way of example only,with reference to the accompanying drawings in which:

FIGS. 1A and 1B illustrate steps involved in a galvanic depositionprocess in accordance with the prior art and with regard to a waferhaving high aspect ratio vias; and

FIGS. 2A, 2B and 2C illustrate three stages in a back-end metallisationprocess involving copper-fill in accordance with an embodiment of thepresent invention.

DETAILED DESCRIPTION

Turning first to FIG. 1A, there is illustrated a schematic cross-sectionof a semiconductor wafer 10 having a recess such as a hole 12 formedtherein and which it is intended be filled with copper in accordancewith a back-end copper-fill damascene process with galvanicallydeposited copper. The dimensions of the hole illustrated are such as toexhibit a relatively high aspect ratio, for example larger than four forrecess diameter smaller than 0.18 μm as will become quite common withfuture generation damascene products since even dimensions of 0.13 and0.10 μm and smaller are likely to be used in the near future, and evensmaller sizes are likely to be pursued in the longer term.

Prior to deposition of the galvanic copper, a copper seed layer 14 isdeposited by sputtering on the exposed surfaces of the wafer 10including the surfaces of the recess 12. However, for such aspect ratiovalues, such a process can disadvantageously result in poor coverage ofthe recesses walls. This is illustrated in FIG. 1A by reference toportion 16 of the side-wall surfaces of the recess 12 which remainuncovered by the copper seed layer 14. If, as illustrated in FIG. 1B,galvanic deposition of copper proceeds so as to achieve copper fill ofthe recess 12 by means of plated copper 18, it should be appreciatedthat voids 20 remain within the structure which can prove particularlydisadvantageous and should be avoided.

It is a requirement of the present invention to prevent the formation ofsuch voids in a relatively simple and readily adaptable manner.

Turning now to FIGS. 2A-2C, there is illustrated a basic wafer structurecorresponding to that illustrated with reference to FIGS. 1A and 1B.However, importantly, the process steps differ in that, as illustratedin FIG. 2A, a modifying agent is applied to the wafer so as to modify atleast the exposed surfaces of the side-wall surfaces of the recess 12.As illustrated in FIG. 2A, but which is not essential to the presentinvention, the modifying agent can also be applied to the surfaces ofthe copper seed layer. However, it should be appreciated that it is themodification of the exposed surface regions appearing subsequent to theapplication of, for example, a poor quality seed layer that representsan important aspect of the present invention.

In the illustrated example, it is in fact a Ta, or TaN (TantalumNitride) etc., barrier layer formed on the side wall surfaces of therecess 12 prior to introduction of the copper seed layer that is in factmodified in accordance with this illustrated embodiment of the presentinvention.

As will be appreciated, this modification serves to enhance lateralgrowth of a galvanic copper layer on the above-mentioned modifiedbarrier layer.

Such surface modification requires that the modifying agent absorb onthe exposed surface, for example the barrier layer exposed surface 16such as that mentioned above. Further, such modification advantageouslyserves to improve the electrochemical kinetics for copper deposition soas to increase the speed of electron transfer reaction whilst limitingthe nucleation overpotential for copper. That is, the current density atthe modified barrier surface is higher than at the copper seed layersurface and so, under constant current electroplating as commonly arisesin a damascene process, the current is then advantageously concentratedtowards the modified barrier surface and the above-mentioned requiredlateral growth is achieved.

In an alternative process, the surface modification agents function onthe basis of a mixture of the organic additives commonly found within agalvanic plating bath since such additives serve to decrease the copperplating rate at a given potential by the absorption on the copper seedlayer. The surface modification agents absorbed into the exposed surface22 can prove to be more strongly bonded to the barrier material then theaforementioned plating bath additives such that the decrease in theplating rate only occurs on the copper seed layer and so thereby resultsin relative lateral growth on the required exposed recess surfaces. Themodified exposed surface 22 of the recess therefore provides for initialcopper growth 24 a non-copper surface regions 22 during the early stagesof the galvanic copper plating such that, upon completion of thegalvanic copper plating 26 as illustrated in FIG. 2C, the formation ofvoids is at least advantageously limited or prevented.

Advantageously, the modifying agent can consist of metallicnanoparticles such as palladium or a Pd/Sn alloy, or can comprise salineexhibiting suitable functionality, such as those of a cyanide-, amine-or thiol-group. Thus, in accordance with this aspect of the presentinvention a silane with one functional group such as cyanide, amine,thiol, etc and three alkoxy groups can be used which serve to ensureproper bonding of the silane to the substrate. It should of course beappreciated that such a class of molecules is not limited to silanes,titanates and others can be used.

It should therefore be appreciated that the present invention providesfor a relatively simple and adaptable process for effectively repairinginitial copper seed layers that, particularly for reasons of aspectsratio, exhibit variations in thickness sufficient to provide for exposedside-surface walls of a recess.

It should however be appreciated that the present invention is notrestricted to the details of the foregoing example. For example, theprocess can be incorporated in the copper-fill of any appropriatestructure whether encompassing vias or holes etc. and, further, a choiceof surface-modification agents is not restricted to those discussedabove but can comprise any appropriate agent serving to be absorbed intothe exposed side-wall surface of the recess so as to enhance the initialgrowth of copper thereon.

1. A method of manufacturing an electronic device that includes a recessto be filled with copper, the recess having surfaces, the methodcomprising: forming a plating base on at least a first portion of thesurfaces of the recess for subsequent galvanic deposition of the copper,there being at least one surface region not covered by the plating base;and introducing, subsequent to the formation of the plating base, butprior to the galvanic deposition of the copper, a modifying agent to therecess which serves to absorb in the surface regions not covered by theplating base and to thereby modify the surface regions not covered bythe plating base to promote the galvanic deposition of the copperthereon; wherein the modifying agent comprises a functional silane. 2.The method as claimed in claim 1, wherein the modifying agent absorbsinto the surface regions not covered by the plating base so as toenhance the galvanic copper deposition kinetics for the modifiedsurface.
 3. The method as claimed in claim 1, wherein the modifyingagent is arranged to absorb into the surface regions not covered by theplating base in a manner serving to counteract the effect of organicadditives of a galvanic plating bath which would otherwise serve todecrease the plating rate of the surface regions not covered by theplating base.
 4. The method as claimed in claim 1, wherein the silanecontains a functionality of a cyanide-, amine-, or thiol-group.
 5. Amethod of forming a copper structure, comprising: providing a substratehaving a recess formed therein; forming a barrier layer on surfaces ofthe recess, the barrier layer having a surface; forming a seed layer onthe surface of the barrier layer, the seed layer having a surface, theseed layer at least partially covering the surface of the barrier layer;applying a modifying agent to at least portions of the surface thebarrier layer which are not covered by the seed layer; and forming alayer of copper by galvanic deposition over the seed layer surface andthe modified barrier layer surface; wherein the modifying agentcomprises a molecule having at least one functional group, wherein thefunctional group is selected from the group consisting of acyanide-group, an amine-group, and a thiol-group, and, wherein themolecule further includes three alkoxy groups.
 6. The method of claim 5,wherein the molecule comprises silane having three alkoxy groups, andfurther having the functional group that is selected word the groupconsisting of a cyanide-group, an amine-group, and a thiol-group.
 7. Themethod of claim 6, wherein the barrier layer comprises a materialselected from the group consisting of tantalum and tantalum nitride. 8.The method claim 7, wherein the recess has an aspect ratio greater thanor equal to four.
 9. A method of forming a copper structure, comprising:providing a substrate having a recess formed therein; forming a barrierlayer on surfaces of the recess, the barrier layer having a surface;forming a seed layer on the surface of the barrier layer, the seed layerhaving a surface, the seed layer at least partially covering the surfaceof the barrier layer; applying a modifying agent to at least portions ofthe surface of the barrier layer which are not covered by the seedlayer; and forming a layer of copper by galvanic deposition over theseed layer surface and the modified barrier layer surface; wherein themodifying agent comprises a molecule having at least one functionalgroup, the molecule comprises silane and the functional group isselected from the group comprising of a cyanide-group, an amine-group,and a thiol-group.
 10. The method of claim 9, wherein the barrier layercomprises a material selected from the group consisting of tantalum andtantalum nitride.
 11. The method claim 9, wherein the recess has anaspect ratio greater than or equal to four.